/
ASML Zero Level Etch

This Confluence space has been migrated and is no longer current. The content on this space will no longer be accessible after July 1, 2026.

ASML Zero Level Etch

May 08, 2020

The ASML PAS 5500/200 Stepper requires the alignment marks to be etched 1200+/- 200Å into the silicon substrate. To obtain consistent results, it is important to remove any oxide on the surface of the wafer prior to coating with resist. Ten seconds in 10:1 buffered oxide etch should be sufficient. Wafers may be coated and developed using the standard recipes on the SVG Track.

  • Trion Phantom RIE

  • Zero Etch recipe

    • 50 sccm CHF3

    • 25 sccm CF4

    • 10 sccm O2

    • 200 watts RF

    • 100 mT

    • 90 seconds