Meeting Notes - Avionics - 2023-01-25

Date

Jan 25, 2023

Attendees

• @Yevgeniy Gorbachev (RIT Student)

• @Mary Dertinger (RIT Student) 

Goals

• Review power, backplane, sensor schematics

General Notes

Updates/changes to requirements for each module:

• Now responsible for ESD/overcurrent/reverse-polarity protection on the module. 

  • Overcurrent protection is to be accomplished by a polyfuse (aka PTC or self-healing fuse) in series with a standard fast-blow fuse on each power rail, appropriately sized to the expected load of the module. Polyfuse should be rated to trip before the other fuse.

  • Reverse polarity protection is to be accomplished with a low-resistance FET. See Texas Instruments SLVA139 Figure 3 (Link) for more details. 

  • ESD protection at a minimum on all out-of-board connectors, preferably also including internal-to-board protections. 

    • Mentioned multi-channel WSON EMI filter with ESD protection: TPD8F003DQDR (Datasheet)

    • To further mitigate short/shock risk, where possible replace male headers with shrouded female headers

    • For further information on protecting data/signal lines from ESD, see Texas Instrument's 2022 System-Level ESD Protection Guide (Link)

• All modules using Vbat must design to withstand battery voltages up to 12v

• LEDs on the backplane (interfaced through 30-pin connector) are to be operated at 3.3v, although they are 5v tolerant.

• Any LEDs on the module (including those for ethernet) must be toggleable by the module's MCU. Recommend using Vishay SI2301CDS-T1-GE3 (Link) 

  • Modules are advised to take any other ground-exclusive, high-load components and place them on switching as well, to be deactivated when the umbilical is removed.

• Modules must be designed so that they can be assembled using JLCPCB's single-sided, "Economic" assembly option

  • In addition to one-sided assembly, places some restrictions on minimum pin spacing, package type, etc.

    • Minimum Package: 0402

    • Minimum IC Pin Spacing: 0.5mm

    • Minimum BGA Spacing: 0.4mm

  • Any parts not available for economic PCB will be marked as such on JLC's part library. 

  • No through-hole components should be assembled by JLCPCB

  • https://jlcpcb.com/capabilities/pcb-assembly-capabilities

• Any programming resistors (such as those used on Ethernet) need to be assembled in a way that the module ships in a determinate, ready-to-use configuration

  • In other words, do not have both a pull-up and a pull-down resistor on the same pin

All modules will have an STM32 GPIO check in the near future, to ensure the proper pins are being used for certain signals

• The software team requests, if possible, putting the Wiznet and the memory IC on 2 different SPI busses

• Multiple i2C busses can be used for ease of routing if desired

Battery protection circuitry, as well as the power changeover circuitry, is now moved to the backplane. 

• This potentially includes a battery protection IC. See XB8089D as a 1S reference (Datasheet)

All modules must update the ethernet layout to include the 33R EMI-reducing resistors called out in the W5500 reference design.

• May be removed/replaced with 0R in the future. 

Discussion items

Action items