Overview

This module provides power to the backplane and other modules.

Current Status

Layout

Action Items

James May (RIT Student) Update Block Diagram to reflect current design
James May (RIT Student) simulate umbilical switch in LTspice, look at power loss
James May (RIT Student) Assemble BOM & include all components
- Create BOM file
- Add switcher
- Add switcher passives
- Add umbilical switch components
- Add monitoring components
- Add monitoring passives
- Add microcontroller
- Add microcontroller passives
- Add WIZnet
- Add WIZnet passives
- Add flash memory
- Add flash passives
James May (RIT Student) Spec shielded inductors
James May (RIT Student) Complete schematic capture
- Complete switcher design
- 5V switcher
- 3.3V switcher
- Backplane connector
- current measure (all 3)
- voltage measure
- WIZnet
- Complete battery/umbilical switch design
- Battery/umbilical switch transfer to Billy
- Review umbilical switch diode
- Umbilical connector choose
- 33R to wiznet
- Arrange top level
- Determine MCU pinouts
- Programming interface
- Add microcontroller & logging circuitry (should be roughly identical to other modules)
- Add nc mount holes
- Address pins to mcu
- Polyfuse & standard fast-blow fuse to battery line (poly rated to trip before fast-blow)
- Reverse polarity protection on battery line
- Add ESD protection
- FETs on wiznet LEDs?
- Update backplane connector
- Add NCs to MCU
- Make power jumper female
- REF designators
- Fix MCU top level block
- Swap to INA219
- Volt current sense pins?
James May (RIT Student) Complete layout
- Define board shape (including fillets!)
- Ensure mounting holes are placed in correct spots
- Ensure backplane connector is placed in correct spot
- Place components
- Calculate power trace widths
- set components in meaningful way
- Fix layer stackup
- Route power traces
- Route signal traces
- polygon pours
- Silkscreen it up (following standards)
- Import Ben's DRC
- Run DRC until good
James May (RIT Student) Simulate switchers in Webench
James May (RIT Student) Layout Review Updates
- Swap out old ESD for new ESD
- 8mil trace & 8mil spacing compliance
- Silkscreen unstupid
- Via 1:2 compliance
- Nuke ref des?
- Make fonts guardians
- Ensure all components have jlc number
- Fix diff pairs
- Tooling holes
- Board # JLCJLCJLC
- Move crystal
- Tooling holes
- Via stitch grounds
- Un-nuke designators a bit
- Silkscreen launch standard compliance
- flippy flip switcher circuits?
- pull back ground pour?
James May (RIT Student) Generate Manufacturing Files