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SPICA Design Verification

SPICA Design Verification

Owned by Joseph Even (RIT Student)

Sept 26, 2020

Analytics

Loading data...

System	Procedure	Check
Power Supply		Y
uC Reset		Y
Deployment Channel		Y
Deployment Continuity		Y

, multiple selections available,

{"serverDuration": 35, "requestCorrelationId": "415e38a8e0a34be597bf1e402beeaff4"}